TODO
  - fix line numbering (have to account for include processing, probably requires redoing that)


April 9, 2005.

This is somewhat further from being useful than I imagined.

For one, its error reporting sucks.

For two, it is so far from 'standard' PIC asm that it is a little
nuissance to port stuff.

Anyway, config stuff and hex output are both necessary before progress
can be made.

I just added an 'include' directive.

I probably need something to, after scan_op(), scan to the end of the
line, producing errors on the way for discarded garbage.


April 10, 2005.

It's occurred to me that this is lacking documentation in a pretty
severe way.

W = working register
k = literal number preceded by # (generally 8 bit)
n = a number
f = a file register index
a = bit to indicate how we are using the file register (pic18asm does it magic)
C = carry flag
N = negative flag
O = overflow flag
Z = zero flag
S = WS,STATUSS,BSRS backups for W,STATUS,BSR
lab = address to branch to
nlab = nearby label to branch to (+/-128 words)


	pic18asm	effect		'standard' op
Arithmetic:
	ADD W,f		W=W+f		ADDWF f,0,a
	ADD f,W		f=W+f		ADDWF f,1,a
	ADD W,k		W=W+k		ADDLW k
	ADDC W,f	W=W+f+C		ADDWFC f,0,a
	ADDC f,W	f=W+f+C		ADDWFC f,1,a
	AND W,f		W=W&f		ANDWF f,0,a
	AND f,W		W=f&f		ANDWF f,1,a
	AND W,k		W=W&k		ANDLW k
	BCLR f,n	f&=~(1<<n)	BCF f,n,a
	BCLR f.n	f&=~(1<<n)	BCF f,n,a
	BSET f,n	f|=(1<<n)	BSF f,n,a
	BSET f.n	f|=(1<<n)	BSF f,n,a
	BTG f,n		f^=(1<<n)	BTG f,n,a
	BTG f.n		f^=(1<<n)	BTG f,n,a
	CLR f		f=0		CLRF f
	COMF W,f	W=~f		COMF f,0,a
	COMF f		f=~f		COMF f,1,a
	DAW		W=BCDfixup(W)	DAW
	DECF W,f	W=f-1		DECF f,0,a
	DECF f		f=f-1		DECF f,1,a
	DECFSZ W,f	W=f-1 if(Z) skip DECFSZ f,0,a
	DECFSZ f	f=f-1 if(Z) skip DECFSZ f,1,a
	DECFSNZ W,f	W=f-1 if(!Z) skip DECFSNZ f,0,a
	DECFSNZ f	f=f-1 if(!Z) skip DECFSNZ f,1,a
	INCF W,f	W=f+1		INCF f,0,a
	INCF f		f=f+1		INCF f,1,a
	INCFSZ W,f	W=f+1 if(Z) skip INCFSZ f,0,a
	INCFSZ f	f=f+1 if(Z) skip INCFSZ f,1,a
	INCFSNZ W,f	W=f+1 if(!Z) skip INCFSNZ f,0,a
	INCFSNZ f	f=f+1 if(!Z) skip INCFSNZ f,1,a
	IOR W,k		W=W|k		IORLW k
	IOR W,f		W=W|f		IORWF f,0,a
	IOR f,W		f=W|f		IORWF f,1,a
	MUL W,k		PROD=W*k	MULLW k
	MUL W,f		PROD=W*f	MULWF f,a
	NEG f		f=-f		NEGF f,a
	RLF W,f		W=f rot left	RLNCF f,0,a
	RLF f		f=f rot left	RLNCF f,1,a
	RLFC W,f	W=f+C rot left	RLCF f,0,a
	RLFC f		f=f+C rot left	RLCF f,1,a
	RRF W,f		W=f rot right	RRNCF f,0,a
	RRF f		f=f rot right	RRNCF f,1,a
	RRFC W,f	W=f+C rot right	RRCF f,0,a
	RRFC f		f=f+C rot right	RRCF f,1,a
	SET f		f=0xFF		SETF f,a
	SUBWB W,f	W=W-f-C		SUBFWB f,0,a
	SUBWB f,W	f=W-f-C		SUBFWB f,1,a
	SUBF W,f	W=f-W		SUBWF f,0,a
	SUBF f,W	f=f-W		SUBWF f,1,a
	SUBFB W,f	W=f-W-C		SUBWFB f,0,a
	SUBFB f,W	f=f-W-C		SUBWFB f,1,a
	SUBLW k		W=k-W		SUBLW k
	SWAPF W,f	W=f nibble swap SWAPF f,0,a
	SWAPF f		f=f nibble swap SWAPF f,1,a
	XOR W,f		W=W^f		XORWF f,0,a
	XOR f,W		f=W^f		XORWF f,1,a
	XOR W,k		W=W^k		XORLW k
Memory:
	MOV W,f		W=f		MOVF f,0,a
	MOV f,f		f=f (NOP)	MOVF f,1,a
	MOV f1,f2	f1=f2		MOVFF f2,f1
	MOV W,k		W=k		MOVLW k
	MOV f,W		f=W		MOVWF f,a
	LFSR f,k	f=k		LFSR f,k
	LBSR k		BSR=k		MOVLB k
Branch:
	BC nlab		if(C) go nlab 	BC nlab
	BNC nlab	if(!C) go nlab 	BNC nlab
	BN nlab		if(N) go nlab 	BN nlab
	BNN nlab	if(!N) go nlab 	BNN nlab
	BO nlab		if(O) go nlab 	BO nlab
	BNO nlab	if(!O) go nlab 	BNO nlab
	BZ nlab		if(Z) go nlab 	BZ nlab
	BNZ nlab	if(!Z) go nlab 	BNZ nlab
	BTSC f,n	if(!f&(1<<n)) skip BTFSC f,n,a
	BTSC f.n	if(!f&(1<<n)) skip BTFSC f,n,a
	BTSS f,n	if(f&(1<<n)) skip  BTFSC f,n,a
	BTSS f.n	if(f&(1<<n)) skip  BTFSC f,n,a
	CMPSEQ f	if(f==W) skip	CPFSEQ f,a
	CMPSGT f	if (f>W) skip	CPFSGT f,a
	CMPSLT f	if (f<W) skip	CPFSLT f,a
	CALL lab	save PC, go lab CALL lab,0  -OR-  RCALL lab
	FCALL		save PC+S, go lab CALL lab,1
	GOTO lab	go lab		BRA lab  -OR-  GOTO lab
	RETFIE		restore PC	RETFIE 0
	FRETFIE		restore PC+S	RETFIE 1
	RETLW k		W=k, restore PC	RETLW k
	RET		restore PC	RETURN 0
	FRET		restore PC+S	RETURN 1
	TSTSZ f		if(f==0) skip	TSTFSZ f,a
Misc:
	CLRWDT		reset watchdog	CLRWDT
	NOP		no operation	NOP
	POP		discard TOS	POP
	PUSH		save PC		PUSH
	RESET		hardware reset	RESET
	SLEEP		stop oscillator	SLEEP
	TBLRD		TABLAT=*TBLPTR	 TBLRD *
	TBLRDI		TABLAT=*TBLPTR++ TBLRD *+
	TBLRDD		TABLAT=*TBLPTR-- TBLRD *-
	TBLIRD		TABLAT=*++TBLPTR TBLRD +*
	TBLWT		*TBLPTR=TABLAT	 TBLWT *
	TBLWTI		*TBLPTR++=TABLAT TBLWT *+
	TBLWTD		*TBLPTR--=TABLAT TBLWT *-
	TBLIWT		*++TBLPTR=TABLAT TBLWT +*
Commands:
	EQU n		assign the value n to the label
	DW n		data big-endian word (maybe should be little?)
	DB n		data byte
	ORG lab		change the current code generation location
Special:
	include "file"	start reading from the named file


Not so bad.  I just ported over the blink example to use my syntax
and fixed the obvious bugs.


April 23, 2005.

I am more and more being drawn towards something like the mainframe
section concept, so that I can put data in its own resumable section.
(so that things which occur near eachother in memory would have no
reason to occur near eachother in the code, like the register
addressing).

August 27, 2005.

I have come back to this project after a long time -- I have considered
it "complete" ever since I finished the pictx software.  The only new
feature not mentioned here is the string literals.  DB "aoeu\01" will
produce, in memory, the five byte sequence of 0x61, 0x6f, 0x65, 0x75, 0x01.

Other things that could really use documentation include how to run this
sucker:
  ./pic18asm foo.s
This will produce the following files:
  foo.bin     binary version of the output (I don't know if its endian
              will match anything useful)
  foo.hex     intel hex format output (works at least with ICprog)
  foo.lst     listing file for debugging etc
